The present invention relates in general to memory cells and, more particularly, to a Magnetic Random Access Memory Cell (MRAM).
A variety of magnetic materials and structures have been utilized to form magnetoresistive materials for non-volatile memory elements, sensors, read/write heads for disk drives, and other magnetic type applications. One prior magnetoresistive element utilized a magnetoresistive material that has two magnetic layers separated by a conductor layer. The magnetization vectors of the two magnetic layers typically are anti-parallel to each other in the absence of any magnetic fields. The magnetization vectors of one of the layers points in one direction and the magnetization vector of the other layer always points in the opposite direction. The magnetic characteristics of such magnetic materials typically require a width greater than one micron in order to maintain the orientation of the magnetization vectors along the width of the cell. The large width requirement limits the density of memories utilizing such materials. Additionally, reading the state of such memories typically requires a two-phase read operation that results in very long read cycles. The two phase read operation also requires extra circuitry to determine the state of the memory, thus increasing the cost of such memories. An example of such a magnetic material and memory is disclosed in U.S. Pat. No. 4,780,848 issued to Daughton et al. on Oct. 25, 1988.
Another prior material uses multi-layer giant magnetoresistive materials (GMR) and utilizes submicron width, in order to increase density. In this structure, the two magnetic layers are also separated by a conductor layer and the magnetization vectors are parallel to the length of the magnetic material. In one embodiment the magnetization vector of one magnetic material layer is always maintained in one direction while the magnetization vector of the second magnetic layer switches between parallel and antiparallel to the first vector.
In these two above described materials, electrons having a specific "spin" (magnetization vector points in a specific direction) conduct in-plane through the stack of the two magnetic layers and a conductor spacer layer. If the spin of the two magnetic layers are the same, the electrons travel through the stack with low scattering which results in low resistance. If the spin of one of the magnetic layers is opposite to the other magnetic layer, the electron of a given spin cannot easily travel to the other magnetic layer. This results in increased electron scattering and therefore a higher resistance can be measured.
In order to determine the logical state of a memory cell utilizing these materials, the memory cell has a reference cell and an active cell. The reference cell always provides a voltage corresponding to one state (either always a "1" or always a "0"). The output of the reference cell is compared to the output of the active cell in order to determine the state of the memory cell. The requirement for an active and a reference cell reduces the density of a memory that utilizes such elements. An example of such a magnetic material and memory is disclosed in U.S. Pat. No. 5,343,422 issued to Kung et al. on Aug. 30, 1994.
Yet another prior material using multi-layer magnetoresistive materials of submicron width comprises two magnetic layers separated instead by an insulator spacer (known as a tunnel junction). In one embodiment the magnetization vector of one magnetic material layer is always maintained in one direction while the magnetization vector of the second magnetic layer switches between parallel and antiparallel (parallel but opposite) to the first vector.
In this tunnel junction, electrons having a specific "spin" (magnetization vector points in a specific direction) tunnel from one magnetic layer through the insulator spacer to the other magnetic layer. If the spin of the receiving magnetic layer is the same as the electron, the electron easily tunnels into the magnetic layer and therefore a low resistance is measured. If the spin of the receiving magnetic layer is the opposite of the electron, the electron cannot easily tunnel to the second magnetic layer and a higher resistance is measured.
In order to determine the logical state of a memory cell utilizing this material, a resistance difference between the two possibilities is detected. An example of such a magnetic material and memory is disclosed in U.S. Pat. No. 5,734,605 issued to Zhu et al. on Mar. 31, 1998.
A magnetic random access memory (MRAM) is a non-volatile memory which basically includes one of these materials, an active device which can be a transistor or diode connected to a sense line, and a word line. The MRAM employs the magnetoresistance effect to store memory states. Magnetic vectors in one or all of the magnetic layers of the material are switched very quickly from one direction to an opposite direction when a magnetic field is applied to the material over a certain threshold. According to the direction of the magnetic vectors in the material, states are stored, for example, one direction can be defined as a logic "0", and another direction can be defined as a logic "1". The material maintains these states even without a magnetic field being applied. The states in the material can be read by passing a current through the cell in a sense line, because of the difference between the resistances of the two magnetic states. An example of such a magnetic material and memory is disclosed in U.S. Pat. No. 5,838,608 issued to Zhu et al. on Nov. 17, 1998.
Each of the above described memory elements require a diode or a transistor to control the current through the element. The diode or transistor is connected in series with the material, e.g., drain, gate, source, magnetic layer, insulator (or conductor), and magnetic layer. This transistor for each memory cell increases the cost of the memory and decreases the density of the chip. An example of such a circuit arrangement is disclosed in U.S. Pat. No. 5,734,605 issued to Zhu et al. on Mar. 31, 1998.
In addition, in the memory elements based on conductive spacer layer, the resistance of the element is mainly controlled by the resistance of the conductive spacer layer which is low. In the case of an insulating spacer layer, the resistance of the element is exponentially dependent on the thickness of the insulating spacer layer and is high and difficult to control uniformly and reproducibly. Also the resistance is inversely proportional to the size (area) of the magnetic bit; therefore, the resistance increases as the cell size decreases for higher memory density.